The present invention relates to a module mounted with semiconductor devices, and in particular, to a module mounted in high density with semiconductor devices having at least one bump electrode.
FIG. 14 is a sectional view showing a part of a conventional semiconductor device having bump electrodes disclosed in, for example, the document of Japanese Patent Laid-Open Publication No. HEI 5-82582 (referred to as a first conventional art hereinafter). In FIG. 14 are shown a semiconductor substrate 1001, bonding pads 1002 placed on the semiconductor substrate 1001, bump electrodes 1003 formed on the bonding pads 1002 and a mold resin 1004. According to this conventional art semiconductor device having bump electrodes, the bump electrodes 1003 connected to an external circuit are formed perpendicularly on the bonding pads 1002 placed on the semiconductor substrate 1001, allowing the external dimensions of the semiconductor device to be reduced to about the dimensions of the semiconductor substrate 1001.
It is to be noted, in this specification, that the term "semiconductor device" Primarily indicates "one electronic component formed by encapsulating a semiconductor chip, at least one electrically wired electrode (e.g., bump electrode) and so forth in a resin and packaging the same". The term "module" basically indicates "a complete product whose substrate is mounted with one or a plurality of electronic components". Further, the term "package" means "a method of forming one electronic component or a configuration of the formed product itself".
When mounting a semiconductor device (see FIG. 15, for example) whose substrate is provided with bump electrodes as described above on a mounting substrate, it has been common to connect bump electrodes 1153 to respective bonding pads 1152 placed on a mounting substrate 1100 by, for example, soldering (this is referred to as a second conventional art hereinafter) as shown in FIG. 16. In this case, the semiconductor device 1150 is directly mounted on the surface of the mounting substrate 1100, and therefore, the mounting density can be increased more than in the case where semiconductor devices are mounted one by one on a substrate via lead terminals.
Further, for example, the document of Japanese Patent Laid-Open Publication No. HEI 6-188362 (this referred to as a third conventional art hereinafter) discloses a semiconductor device mounting structure in which the mounting density is increased by connecting two semiconductor devices in a stacked manner and fixing the integrated two semiconductor devices to a mounting substrate via lead terminals. According to this third conventional art, two semiconductor devices can be mounted in an area required for mounting one semiconductor device.
Furthermore, for example, the document of Japanese Patent Laid-Open Publication No. HEI 6-5778 (this referred to as a fourth conventional art hereinafter) discloses a semiconductor device in which a plurality of semiconductor chips are arranged in a three-dimensional configuration metal bump is used for insulating and heat radiating benefits for improving bonding strength, and for allowing the semiconductor chips to be easily aligned in position.
However, each of the first, second and fourth conventional arts disclose only a general effect produced by the use of the bump electrode in regard to the improvement of the mounting density of semiconductor devices on the mounting substrate and disclose nothing about the structure for further improving the mounting density of semiconductor devices having bump electrodes.
That is, the aforementioned first conventional art discloses only a measure for compacting the external dimensions of the semiconductor device by means of bump electrodes, while the second conventional art discloses only a measure for directly mounting a semiconductor device on a mounting substrate by means of bump electrodes. Lastly, the fourth conventional art discloses only a three-dimensional arrangement structure of semiconductor devices employing bump electrodes.
The third conventional art can indeed improve the semiconductor device mounting density per unit area of the substrate to a certain extent by mounting two semiconductor devices in a stacked manner on a mounting substrate. Even the third conventional art cannot achieve a mounting density higher than the above. Furthermore, in this configuration, the two semiconductor devices are held above the substrate in a suspended state via the lead terminals, and therefore, the semiconductor devices protrude high above the substrate, also leading to a disadvantage in compacting the module.